TK7874 .S9274 2005
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25th Annual BACUS Symposium on Photomask Technology 4-7 October 2005, Monterey, California, USA / |
1 |
TK7874 .S9274 2007e
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Photomask technology 2007 18-21 September, 2007, Monterey, California, USA / |
1 |
TK7874 .S9274 2008
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Photomask technology 2008 7-10 October 2008, Monterey, California, USA / |
1 |
TK7874 .S9274 2009
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Photomask technology 2009 14-17 September 2009, Monterey, California, United States / |
1 |
TK7874 .S9274 2010e
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Photomask technology 2010 13-16 September 2010, Monterey, California, United States / |
1 |
TK7874 .S9274 2011
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Photomask technology 2011 19-22 September 2011, Monterey, California, United States / |
1 |
TK7874 .S9274 2012e
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Photomask technology 2012 September 11, 2012, Monterey, California, USA / |
1 |
TK7874 .S9274 2013e
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Photomask technology 2013 : 10-12 September 2013, Monterey, California, United States / |
1 |
TK7874 .S9274 2014
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Photomask Technology 2014 : 16-18 September 2014, Monterey, California, United States / |
1 |
TK7874 .S9434 1991
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11th annual Symposium on Photomask Technology proceedings : September 25-27, 1991, Sunnyvale, California / |
1 |
TK7874 .S9435
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Annual Symposium on Photomask Technology / |
1 |
TK7874 .S9435 1992
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12th Annual Symposium on Photomask Technology and Management proceedings : 23-24 September 1992, Sunnyvale, California / |
1 |
TK7874 .S9435 1993
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13th Annual Symposium on Photomask Technology and Management proceedings : 22-23 September 1993, Santa Clara, California / |
1 |
TK7874 .S9435 1996
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16th Annual Symposium on Photomask Technology and Management proceedings, 18-20 September 1996, Redwood City, California / |
1 |
TK7874 .S9438 1999
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19th Annual Symposium on Photomask Technology 15-17 September 1999, Monterey, California / |
1 |
TK7874 .S96
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Digest of technical papers : Symposium on VLSI Technology. |
1 |
TK7874 .S97 2017eb
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System reduction for nanoscale IC design / |
1 |
TK7874 .T357 1996
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Power hybrid circuit design and manufacture / |
1 |
TK7874 .T357 1996eb
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Power hybrid circuit design and manufacture |
2 |
TK7874 .T36 2013
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Electromigration modeling at circuit layout level / |
1 |