Call Number (LC) | Title | Results |
---|---|---|
TK7885.7 .L444 2000eb | VHDL coding and logic synthesis with Synopsys / | 1 |
TK7885.7 .L55 2005 | Designing digital computer systems with Verilog / | 1 |
TK7885.7 .L55 2005eb | Designing digital computer systems with Verilog / | 1 |
TK7885.7 .M39 1992 |
A guide to VHDL / A guide to VHDL |
2 |
TK7885.7 .M39 1993 | A guide to VHDL / | 1 |
TK7885.7 .M43 2012 | Beginning digital from a VHDL perspective / | 1 |
TK7885.7 .M44 2020eb | System Verilog assertions and functional coverage : guide to language, methodology and applications / | 1 |
TK7885.7 .M49 2003eb | Principles of functional verification | 1 |
TK7885.7 .M49 2004 | Principles of functional verification / | 1 |
TK7885.7 .M54 2008eb |
FSM-based digital design using Verilog HDL / FSM-based digital design using Verilog HDL |
3 |
TK7885.7 .M56 2007 | Hardware verification with SystemVerilog : an object-oriented framework / | 1 |
TK7885.7 .M56 2007eb |
Hardware verification with SystemVerilog an object-oriented framework / Hardware verification with SystemVerilog : an object-oriented framework / |
2 |
TK7885.7 .M58 1999 | Principles of Verilog PLI / | 2 |
TK7885.7 .N36 1999 | Verilog digital system design / | 1 |
TK7885.7 .N36 1999eb | Verilog digital system design | 1 |
TK7885.7 .N38 1998 | VHDL : analysis and modeling of digital systems / | 1 |
TK7885.7 .N38 2007 | VHDL : modular design and synthesis of cores and systems / | 1 |
TK7885.7 .N39 1997 | VHDL : a logic synthesis approach / | 1 |
TK7885.7 .O89 1994 |
A designer's guide to VHDL synthesis A designer's guide to VHDL synthesis / |
2 |
TK7885.7 .P33 2004 | Design verification with e / | 1 |