Design and testing of reversible logic / Ashutosh Kumar Singh, Masahiro Fujita, Anand Mohan, editors.
The book compiles efficient design and test methodologies for the implementation of reversible logic circuits. The methodologies covered in the book are design approaches, test approaches, fault tolerance in reversible circuits and physical implementation techniques. The book also covers the challen...
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| Online Access: |
Full Text (via Springer) |
|---|---|
| Other Authors: | , , |
| Format: | eBook |
| Language: | English |
| Published: |
Singapore :
Springer,
[2020]
|
| Series: | Lecture notes in electrical engineering ;
v. 577. |
| Subjects: |
MARC
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| 245 | 0 | 0 | |a Design and testing of reversible logic / |c Ashutosh Kumar Singh, Masahiro Fujita, Anand Mohan, editors. |
| 264 | 1 | |a Singapore : |b Springer, |c [2020] | |
| 264 | 4 | |c ©2020. | |
| 300 | |a 1 online resource : |b illustrations (some color) | ||
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| 490 | 1 | |a Lecture notes in electrical engineering, |x 1876-1100 ; |v volume 577. | |
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a Preface -- Introduction -- Fundamental Concepts -- Design Approaches -- Test Approaches -- Fault Tolerance in Reversible Circuits -- Applications to Emerging Technologies -- Physical Implementation Techniques. | |
| 520 | |a The book compiles efficient design and test methodologies for the implementation of reversible logic circuits. The methodologies covered in the book are design approaches, test approaches, fault tolerance in reversible circuits and physical implementation techniques. The book also covers the challenges and the reversible logic circuits to meet these challenges stimulated during each stage of work cycle. The novel computing paradigms are being explored to serve as a basis for fast and low power computation. | ||
| 588 | 0 | |a Online resource; title from PDF title page (SpringerLink, viewed August 28, 2019) | |
| 650 | 0 | |a Logic circuits |x Design and construction. | |
| 650 | 0 | |a Logic circuits |x Testing. | |
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| 650 | 7 | |a Logic circuits |x Testing. |2 fast |0 (OCoLC)fst01002044. | |
| 700 | 1 | |a Singh, Ashutosh Kumar, |e editor. |0 http://id.loc.gov/authorities/names/n2019008413. | |
| 700 | 1 | |a Fujita, Masahiro, |e editor. |0 http://id.loc.gov/authorities/names/n81050977. | |
| 700 | 1 | |a Mohan, Anand |c (Of Indian Institute of Technology), |e editor. |0 http://id.loc.gov/authorities/names/n2018183319. | |
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