Optimizing transformations of stencil operations for parallel cache-based architectures [electronic resource]

Parallel Stencil Operations; Optimizing Transformation; Parallel Cache-based Architectures.

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Bibliographic Details
Online Access: Online Access
Corporate Author: Los Alamos National Laboratory (Researcher)
Format: Government Document Electronic eBook
Language:English
Published: Washington, D.C : Oak Ridge, Tenn. : United States. Dept. of Energy ; distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy, 1999.
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Description
Summary:Parallel Stencil Operations; Optimizing Transformation; Parallel Cache-based Architectures.
Abstract:This paper describes a new technique for optimizing serial and parallel stencil- and stencil-like operations for cache-based architectures. This technique takes advantage of the semantic knowledge implicity in stencil-like computations. The technique is implemented as a source-to-source program transformation; because of its specificity it could not be expected of a conventional compiler. Empirical results demonstrate a uniform factor of two speedup. The experiments clearly show the benefits of this technique to be a consequence, as intended, of the reduction in cache misses. The test codes are based on a 5-point stencil obtained by the discretization of the Poisson equation and applied to a two-dimensional uniform grid using the Jacobi method as an iterative solver. Results are presented for a 1-D tiling for a single processor, and in parallel using 1-D data partition. For the parallel case both blocking and non-blocking communication are tested. The same scheme of experiments has bee n performed for the 2-D tiling case. However, for the parallel case the 2-D partitioning is not discussed here, so the parallel case handled for 2-D is 2-D tiling with 1-D data partitioning.
Item Description:Published through the Information Bridge: DOE Scientific and Technical Information.
06/28/1999.
"LA-UR-99-1119"
1999 International Conference on Parallel and Distributed Processing Techniques and Applications, Monte Carlo Resort, Las Vegas, NV (US), 06/28/1999--07/01/1999.
Davis, K.; Bassetti, F.
Physical Description:5 pages.