Analog and Mixed-Signal Hardware Description Language / edited by Alain Vachoux, Jean-Michel Bergé, Oz Levia, Jacques Rouillard.

Hardware description languages (HDL) such as VHDL and Verilog have found their way into almost every aspect of the design of digital hardware systems. Since their inception they gradually proved to be an essential part of modern design methodologies and design automation tools, ever exceeding their...

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Bibliographic Details
Online Access: Full Text (via Springer)
Main Author: Vachoux, Alain
Other Authors: Bergé, Jean-Michel, Levia, Oz, Rouillard, Jacques
Format: eBook
Language:English
Published: Boston, MA : Springer US, 1997.
Series:Current issues in electronic modeling ; 10.
Subjects:
Table of Contents:
  • 1. Applicability of Discrete Event Hardware Description Languages to the Design and Documentation of Electronic Analog Systems
  • 1.1. Introduction
  • 1.2. Modeling Basic Analog Concepts
  • 1.3. Network-Independent Data-Sampled Analog Systems
  • 1.4. Network-Dependent Data-Sampled Analog Systems
  • 1.5. Summary
  • 2. VHDL 1076.1: Analog and Mixed-Signal Extensions to VHDL
  • 2.1. Introduction
  • 2.2. Foundations
  • 2.3. The 1076.1 Language
  • 2.4. Examples
  • 2.5. Concluding Remarks
  • 3. Analog Extensions to Verilog
  • 3.1. Introduction
  • 3.2. Natures and Disciplines
  • 3.3. Network Models
  • 3.3. Verilog-A Features
  • 3.4. Multi-Disciplinary Modeling
  • 3.5. Summary
  • 4. Op3:A Behavioral Generic Model of Operational Amplifiers
  • 4.1. Introduction
  • 4.2. Description of the Generic Op Amp Model op3
  • 4.3. Application Examples of the op3 Model
  • 4.4. Conclusions
  • 5. Non-Linear State Space Averaged Modeling of A 3-State Digital Phase-Frequency Detector
  • 5.1. Introduction
  • 5.2. Digital 3-State Phase-Frequency Detector Model
  • 5.3. Resettable Integrator
  • 5.4. Calibration
  • 5.5. DC Convergence and AC Analysis
  • 5.6. Sample Application
  • 5.7. Switched Voltage Output Stage
  • 5.8. Conclusions
  • Appendix A: SpectreHDL Model
  • Appendix B: Verilog Model
  • 6. Behavioural Modelling of Analogue Systems with Absynth
  • 6.1. Introduction
  • 6.2. Analogue Modelling
  • 6.3. Graphical Description
  • 6.4. Automatic Code Generation
  • 6.5. Results
  • 6.6. Conclusions
  • 7. VHDL-1076.1 Modeling Examples for Microsystem Simulation
  • 7.1. Introduction
  • 7.2. Modeling Principles
  • 7.3. Conservative Systems
  • 7.4. Piecewise Linear Models
  • 7.5. Signal Flow Models
  • 7.6. Piecewise Defined Behavior
  • 7.7. Physical Parameter Extraction from Finite Element Simulations
  • 7.8. Simulation Results using HDL-A Models
  • 7.9. Conclusions.