Customizable embedded processors [electronic resource] : design technologies and applications / Paolo Ienne, Rainer Leupers.
Customizable processors have been described as the next natural step in the evolution of the microprocessor business: a step in the life of a new technology where top performance alone is no longer sufficient to guarantee market success. Other factors become fundamental, such as time to market, conv...
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Full Text (via ScienceDirect) |
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| Format: | Electronic eBook |
| Language: | English |
| Published: |
San Francisco, Calif. :
Elsevier/Morgan Kaufmann,
2007.
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| Series: | Morgan Kaufmann series in systems on silicon.
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| Subjects: |
MARC
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| 100 | 1 | |a Ienne, Paolo. |0 http://id.loc.gov/authorities/names/no2006109157 |1 http://isni.org/isni/000000007268465X | |
| 245 | 1 | 0 | |a Customizable embedded processors |h [electronic resource] : |b design technologies and applications / |c Paolo Ienne, Rainer Leupers. |
| 260 | |a San Francisco, Calif. : |b Elsevier/Morgan Kaufmann, |c 2007. | ||
| 300 | |a 1 online resource (xxviii, 497 pages) : |b illustrations. | ||
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| 490 | 1 | |a The Morgan Kaufmann series in systems on silicon | |
| 504 | |a Includes bibliographical references (pages 443-484) and index. | ||
| 588 | 0 | |a Print version record. | |
| 505 | 0 | |a Introduction -- Business Opportunities: The Case of Wireless Applications -- Logistic Challenges: Lofty Ambitions and Stark Realities of Customizing Processors -- Architectural Description Languages -- Retargetable Toolsets -- Processor Configuration -- Automatic Instruction-Set Extensions -- Challenges to Automatic Customization -- Toolset Support for Instruction-Set Extensions -- Coprocessor Generation from Executable Code -- Datapath Synthesis -- Instruction Matching and Modelling -- Processor Verification -- Sub-RISC Processors -- An ASIP for UMTS-FDD Cell Search -- Hardware/software Trade-offs for Advanced 3G Channel Decoding -- FPGA-Based Processor Implementation -- Designing a H.264 Encoder with Real-World Tradeoffs. | |
| 520 | |a Customizable processors have been described as the next natural step in the evolution of the microprocessor business: a step in the life of a new technology where top performance alone is no longer sufficient to guarantee market success. Other factors become fundamental, such as time to market, convenience, energy efficiency, and ease of customization. This book is the first to explore comprehensively one of the most fundamental trends which emerged in the last decade: to treat processors not as rigid, fixed entities, which designers include as is in their products; but rather, to build sound methodologies to tailor-fit processors to the specific needs of such products. This book addresses the goal of maintaining a very large family of processors, with a wide range of features, at a cost comparable to that of maintaining a single processor. First book to present comprehensively the major ASIP design methodologies and tools without any particular bias. Written by most of the pioneers and top international experts of this young domain. Unique mix of management perspective, technical detail, research outlook, and practical implementation. | ||
| 546 | |a English. | ||
| 650 | 0 | |a Embedded computer systems. |0 http://id.loc.gov/authorities/subjects/sh87006632 | |
| 650 | 0 | |a Embedded computer systems |x Design. | |
| 650 | 0 | |a Embedded computer systems |x Design and construction. |0 http://id.loc.gov/authorities/subjects/sh2008119360 | |
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| 650 | 7 | |a Embedded computer systems. |2 fast | |
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