|
|
|
|
| LEADER |
00000cam a2200000I 44500 |
| 001 |
b9128874 |
| 003 |
CoU |
| 005 |
20170512071946.3 |
| 006 |
m o d |
| 007 |
cr ||||||||||| |
| 008 |
170407s2017 sz a ob 001 0 eng d |
| 019 |
|
|
|a 982105403
|a 982141484
|a 982241951
|a 982344069
|a 982427123
|a 982500564
|
| 020 |
|
|
|a 9783319562551
|q (electronic bk.)
|
| 020 |
|
|
|a 331956255X
|q (electronic bk.)
|
| 020 |
|
|
|z 9783319562544
|q (print)
|
| 020 |
|
|
|z 3319562541
|
| 035 |
|
|
|a (OCoLC)ocn981912197
|
| 035 |
|
|
|a (OCoLC)981912197
|z (OCoLC)982105403
|z (OCoLC)982141484
|z (OCoLC)982241951
|z (OCoLC)982344069
|z (OCoLC)982427123
|z (OCoLC)982500564
|
| 040 |
|
|
|a N$T
|b eng
|e rda
|e pn
|c N$T
|d EBLCP
|d GW5XE
|d N$T
|d YDX
|
| 049 |
|
|
|a GWRE
|
| 050 |
|
4 |
|a R857.B5
|
| 100 |
1 |
|
|a Hu, Kai,
|e author.
|
| 245 |
1 |
0 |
|a Computer-aided design of microfluidic very large scale integration (mVLSI) biochips :
|b design automation, testing, and design-for-testability /
|c Kai Hu, Krishnendu Chakrabarty, Tsung-Yi Ho.
|
| 264 |
|
1 |
|a Cham, Switzerland :
|b Springer,
|c 2017.
|
| 300 |
|
|
|a 1 online resource (xiii, 142 pages) :
|b illustrations (some color)
|
| 336 |
|
|
|a text
|b txt
|2 rdacontent.
|
| 337 |
|
|
|a computer
|b c
|2 rdamedia.
|
| 338 |
|
|
|a online resource
|b cr
|2 rdacarrier.
|
| 505 |
0 |
|
|a Preface; Acknowledgements; Contents; 1 Introduction; 1.1 Introduction of Microfluidic Biochip Platforms; 1.2 Overview of Flow-Based Microfluidic Biochips; 1.2.1 Structure and Fabrication; 1.2.2 Components; 1.2.3 Applications; 1.3 Challenges and Motivation; 1.3.1 Design Automation; 1.3.2 Contamination Removal; 1.3.3 Defects and Erroneous Operations; 1.4 Outline of the Book; References; 2 Control-Layer Optimization; 2.1 Motivation and Related Prior Work; 2.2 Problem Description, Design Requirements, and Challenges; 2.2.1 Pressure-Propagation Delay; 2.2.2 Requirements in Control-Layer Design.
|
| 505 |
8 |
|
|a 2.2.3 Valve Addressing2.2.4 Routing of Control Channels; 2.2.5 Placement of Control Pins; 2.2.6 Relationship Between Control-Layer Optimization and Clock-Tree Design in VLSI Circuits; 2.3 Problem Formulation; 2.4 Algorithm Design; 2.4.1 Routing Algorithm 1; 2.4.2 Routing Algorithm 2; 2.5 Experimental Results; 2.5.1 Experiments with Two Fabricated Biochips; 2.5.2 Experiments with Synthetic Benchmarks; 2.6 Conclusions; References; 3 Wash Optimization for Cross-Contamination Removal; 3.1 Motivation and Challenges; 3.2 Problem Description and Formulation.
|
| 505 |
8 |
|
|a 3.2.1 Physical Implementability of a Wash Path3.2.2 Execution Time for a Wash Path; 3.3 Search for a Set of Washing Paths; 3.3.1 Generation of the Path Dictionary; 3.3.2 Storage of the Path Dictionary; 3.3.3 Identification of Washing-Path Set; 3.3.4 Washing of Multiple Contaminant Species; 3.3.5 Complexity Analysis; 3.4 Results: Application to Fabricated Biochips; 3.4.1 Results for ChIP; 3.4.2 A Programmable Microfluidic Device with an 8-by-8 Grid; 3.5 Conclusions; References; 4 Fault Modeling, Testing, and Design for Testability; 4.1 Motivation and Challenges.
|
| 505 |
8 |
|
|a 4.2 Defects and Fault Modeling4.3 Testing Strategy; 4.4 Applications to Fabricated Biochip; 4.4.1 Logic Circuit Model; 4.4.2 Test-Pattern Generation and Results; 4.5 Automated Generation of Logic-Circuit Model; 4.5.1 Physical Representation of Boolean Gates in Netlists; 4.5.2 Hierarchical Modeling; 4.5.3 Fault Analysis Based on ATPG Results; 4.6 Other Practical Concerns; 4.6.1 Test Cost; 4.6.2 Dynamic Faults; 4.6.3 Multiple Faults; 4.7 Experimental Demonstration; 4.7.1 Experimental Feasibility Demonstration; 4.7.2 Pattern Set-up Time, Measurement Time and Refresh Time.
|
| 505 |
8 |
|
|a 4.7.3 Experimental Demonstration I: Cell Culture Chip4.7.4 Experimental Demonstration II: WGA Chip; 4.8 Untestable Faults and Design-For-Testability; 4.8.1 Causes of Untestable Faults; 4.8.2 DfT for Flow-Based Microfluidic Biochips; 4.8.3 Demonstration of Proposed DfT Approach; 4.9 Conclusion; References; 5 Techniques for Fault Diagnosis; 5.1 Motivation and Challenges; 5.2 Problem Description; 5.2.1 Single-Defect-Type Assumption; 5.2.2 Syndrome Analysis; 5.2.3 Formulation as a Hitting-Set Problem; 5.3 Algorithm Design; 5.3.1 Complexity Analysis; 5.4 Results: Application to Fabricated Biochips.
|
| 504 |
|
|
|a Includes bibliographical references and index.
|
| 588 |
0 |
|
|a Online resource; title from PDF title page (SpringerLink, viewed April 18, 2017)
|
| 650 |
|
0 |
|a Biochips
|x Computer-aided design.
|
| 650 |
|
0 |
|a Integrated circuits
|x Very large scale integration
|x Computer-aided design.
|0 http://id.loc.gov/authorities/subjects/sh2008104741.
|
| 700 |
1 |
|
|a Chakrabarty, Krishnendu,
|e author.
|0 http://id.loc.gov/authorities/names/n2002133223
|1 http://isni.org/isni/000000011060464X.
|
| 700 |
1 |
|
|a Ho, Tsung-Yi,
|e author.
|0 http://id.loc.gov/authorities/names/no2008081789.
|
| 776 |
0 |
8 |
|c Original
|z 9783319562544
|z 3319562541
|w (OCoLC)975368442.
|
| 856 |
4 |
0 |
|u https://colorado.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-56255-1
|z Full Text (via Springer)
|
| 907 |
|
|
|a .b91288745
|b 03-07-23
|c 05-22-17
|
| 998 |
|
|
|a web
|b 05-22-17
|c b
|d b
|e -
|f eng
|g sz
|h 0
|i 1
|
| 907 |
|
|
|a .b91288745
|b 10-06-17
|c 05-22-17
|
| 944 |
|
|
|a MARS - RDA ENRICHED
|
| 907 |
|
|
|a .b91288745
|b 05-22-17
|c 05-22-17
|
| 915 |
|
|
|a I
|
| 956 |
|
|
|a Springer e-books
|
| 956 |
|
|
|b Springer Engineering eBooks 2017 English+International
|
| 999 |
f |
f |
|i d2c0927b-8529-52e6-83f3-5b191cbb3dbc
|s 4a4012a7-3751-529c-a15a-868438508532
|
| 952 |
f |
f |
|p Can circulate
|a University of Colorado Boulder
|b Online
|c Online
|d Online
|e R857.B5
|h Library of Congress classification
|i web
|n 1
|
