On-chip training NPU -- algorithm, architecture and SoC design / Donghyeon Han, Hoi-Jun Yoo.
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and his...
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| Online Access: |
Full Text (via Springer) |
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| Main Authors: | , |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Cham :
Springer,
2023.
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| Subjects: |
| Summary: | Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding. Focuses on the requirements and challenges of on-device deep neural network (DNN) training, rather than DNN inference; Provides guidelines for on-device, DNN training semiconductor or System-on-Chip (SoC) design; Includes on-device training semiconductors and SoC design examples to facilitate understanding. |
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| Physical Description: | 1 online resource (xxiii, 237 pages) : illustrations (some color) |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: | 9783031342370 3031342372 |
| Source of Description, Etc. Note: | Source of description: Online resource; title from PDF title page (SpringerLink, viewed August 7, 2023). |