Silicon semiconductor technology : processing and integration of microelectronic devices / Ulrich Hilleringmann.
The book presents the basic steps and the technical implementation of individual processes for microelectronic circuit integration in silicon. Interaction and influences of e. g. oxidation, etching, doping and thermal processes for integrating CMOS- and Bipolar circuits are discussed in detail, begi...
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Language: | English |
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Wiesbaden :
Springer Vieweg,
2023.
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100 | 1 | |a Hilleringmann, Ulrich. | |
245 | 1 | 0 | |a Silicon semiconductor technology : |b processing and integration of microelectronic devices / |c Ulrich Hilleringmann. |
260 | |a Wiesbaden : |b Springer Vieweg, |c 2023. | ||
300 | |a 1 online resource (271 p.) | ||
336 | |a text |b txt |2 rdacontent | ||
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505 | 0 | |a Intro -- Preface -- Contents -- 1 Introduction -- 1.1 Exercises -- 2 Silicon Wafer Production -- 2.1 Silicon as Basic Material -- 2.2 Production and Purification of the Raw Material -- 2.2.1 Production of Technical Silicon -- 2.2.2 Chemical Purification of the Technical Grade Silicon -- 2.2.3 Zone Purification -- 2.3 Production of Single Crystals -- 2.3.1 The Crystal Structure -- 2.3.2 Crystal Pulling Method According to Czochralski -- 2.3.3 Crucible-Free Zone Pulling -- 2.3.4 Crystal Defects -- 2.4 Crystal Processing -- 2.4.1 Dicing -- 2.4.2 Surface Treatment -- 2.4.2.1 Lapping | |
505 | 8 | |a 2.4.2.2 Rounding off the Edge of the Slice -- 2.4.2.3 Etching -- 2.4.2.4 Polishing -- 2.5 Tasks for Slice Production -- References -- 3 Oxidation of Silicon -- 3.1 Thermal Oxidation of Silicon -- 3.1.1 Dry Oxidation -- 3.1.2 Wet Oxidation -- 3.1.3 H2O2 Combustion -- 3.2 Modelling of the Oxidation -- 3.3 The SiO2/Silicon Interface -- 3.4 Segregation -- 3.5 Deposition Processes for Silicon Dioxide -- 3.5.1 Silane Pyrolysis -- 3.5.2 TEOS Oxide Deposition -- 3.6 Tasks for the Oxidation of Silicon -- References -- 4 Lithography -- 4.1 Mask Technique | |
505 | 8 | |a 4.1.1 Pattern Generator and Step-And-Repeat Exposure -- 4.1.2 Direct Writing of the Mask with the Electron Beam -- 4.1.3 Mask Techniques for Highest Resolutions -- 4.2 Resist Coating -- 4.2.1 Structure of the Photoresists -- 4.2.2 Deposition of the Photoresist Layer -- 4.3 Exposure Procedure -- 4.3.1 Optical Lithography (Photolithography) -- 4.3.1.1 Contact Exposure -- 4.3.1.2 Proximity Exposure -- 4.3.1.3 Projection Exposure -- 4.3.1.4 Reducing Projection Exposure -- 4.3.1.5 Double Exposure -- 4.3.2 Electron Beam Lithography -- 4.3.3 X-ray Lithography -- 4.3.4 Further Procedures for Structuring | |
505 | 8 | |a 4.3.4.1 Ion Beam Lithography -- 4.3.4.2 Imprint Technology -- 4.3.4.3 Edge Deposition for Nanostructuring -- 4.4 Resist Processing -- 4.4.1 Developing and Curing the Photoresist -- 4.4.2 Line Width Control -- 4.4.3 Removing the Resist Mask -- 4.5 Lithography Tasks -- References -- 5 Etching Technology -- 5.1 Wet Chemical Etching -- 5.1.1 Dip Etching -- 5.1.2 Spray Etching -- 5.1.3 Etching Solutions for Wet-Chemical Structuring -- 5.1.3.1 Isotropic Etching Solutions -- 5.1.3.2 Anisotropic Silicon Etching -- 5.2 Dry Etching -- 5.2.1 Plasma Etching (PE) -- 5.2.2 Reactive Ion Etching (RIE) | |
505 | 8 | |a 5.2.2.1 Process Parameters of Reactive Ion Etching -- 5.2.2.2 Reaction Gases -- 5.2.3 Ion Beam Etching -- 5.2.4 Dry Etching Process for High Etch Rates -- 5.2.5 Atomic Layer Etching (ALE) -- 5.3 Endpoint Detection -- 5.3.1 Visual Control -- 5.3.2 Ellipsometry -- 5.3.3 Optical Spectroscopy -- 5.3.4 Interferometry -- 5.3.5 Mass Spectrometry -- 5.4 Etching Tasks -- References -- 6 Doping Techniques -- 6.1 Alloying -- 6.2 Diffusion -- 6.2.1 Fick's Laws -- 6.2.1.1 Diffusion from an Infinite Dopant Source -- 6.2.1.2 Diffusion from a Limited Dopant Source -- 6.2.2 Diffusion Process | |
500 | |a 6.2.3 Implementation of the Diffusion Process | ||
520 | |a The book presents the basic steps and the technical implementation of individual processes for microelectronic circuit integration in silicon. Interaction and influences of e. g. oxidation, etching, doping and thermal processes for integrating CMOS- and Bipolar circuits are discussed in detail, beginning with the purification of silicon up to the encapsulated integrated circuit. It includes modern processes like atomic layer deposition and etching for nanoscale structures and compares improvements like silicide contacts, copper metallization, high-k dielectrics, and SOI and FINFET structures. All processes are presented looking from the process engineers view. The Content Wafer fabrication Thermal oxidation Lithography Etching technology Doping techniques Chemical and Physical Deposition Metallization and Contacts About the Author Prof. Dr.-Ing. Ulrich Hilleringmann has been teaching semiconductor technology, microelectromechanical systems, sensor technology and optoelectronic system integration since 1989. | ||
504 | |a Includes bibliographical references. | ||
588 | 0 | |a Online resource; title from PDF title page (SpringerLink, viewed August 15, 2023). | |
650 | 0 | |a Semiconductors. | |
650 | 0 | |a Semiconductors |x Materials. | |
650 | 0 | |a Silicon-on-insulator technology. | |
776 | 0 | 8 | |i Print version: |a Hilleringmann, Ulrich |t Silicon Semiconductor Technology |d Wiesbaden : Springer Fachmedien Wiesbaden GmbH,c2023 |z 9783658410407 |
856 | 4 | 0 | |u https://colorado.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-658-41041-4 |z Full Text (via Springer) |
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956 | |a Springer e-books | ||
956 | |b Springer Engineering eBooks 2023 English+International | ||
998 | |b Added to collection springerlink.ebooksengine2023 | ||
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952 | f | f | |p Can circulate |a University of Colorado Boulder |b Online |c Online |d Online |h Library of Congress classification |i web |