Principles of electromagnetic compatibility : laboratory exercises and lectures / Bogdan Adamczyk.
Principles of Electromagnetic Compatibility Understand both the theory and practice of electromagnetic compatibility with this groundbreaking textbook Electromagnetic compatibility (EMC), the ability of a device or system to maintain its operations in an electromagnetic environment without interfere...
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Language: | English |
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Hoboken, NJ :
Wiley : IEEE Press,
[2024]
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Table of Contents:
- Preface
- About the Companion Website
- 1 Frequency Spectra of Digital Signals
- 1.1 EMC Units
- 1.1.1 Logarithm and Decibel Definition
- 1.1.2 Power and Voltage (Current) Gain in dB
- 1.1.3 EMC dB Units
- 1.2 Fourier Series Representation of Periodic Signals
- 1.3 Spectrum of a Clock Signal
- 1.4 Effect of the Rise Time, Signal Amplitude, Fundamental Frequency, and Duty Cycle on the Signal Spectrum
- 1.4.1 Effect of the Rise Time
- 1.4.2 Effect of the Signal Amplitude
- 1.4.3 Effect of the Fundamental Frequency
- 1.4.4 Effect of the Duty Cycle
- 1.5 Laboratory Exercises
- 1.5.1 Spectrum of a Digital Clock Signal
- 1.5.2 Laboratory Equipment and Supplies
- 1.5.3 Measured Spectrum vs. Calculated Spectrum
- 1.5.4 Effect of the Rise Time
- 1.5.5 Effect of the Signal Amplitude
- 1.5.6 Effect of the Fundamental Frequency
- 1.5.7 Effect of the Duty Cycle
- References
- 2 EM Coupling Mechanisms
- 2.1 Wavelength and Electrical Dimensions
- 2.1.1 Concept of a Wave
- 2.1.2 Uniform Plane EM Wave in Time Domain
- 2.1.3 Uniform Plane EM Wave in Frequency Domain
- 2.2 EMC Interference Problem
- 2.3 Capacitive Coupling
- 2.3.1 Shielding to Reduce Capacitive Coupling
- 2.4 Inductive Coupling
- 2.4.1 Shielding to Reduce Inductive Coupling
- 2.5 Crosstalk Between PCB Traces
- 2.6 Common-Impedance Coupling
- 2.7 Laboratory Exercises
- 2.7.1 Crosstalk Between PCB Traces
- References
- 3 Non-Ideal Behavior of Passive Components
- 3.1 Resonance in RLC Circuits
- 3.1.1 "Pure" Series Resonance - Non-Ideal Capacitor Model
- 3.1.2 "Pure" Parallel Resonance - Ferrite Bead Model
- 3.1.3 "Hybrid" Series Resonance - Non-Ideal Resistor Model
- 3.1.4 "Hybrid" Parallel Resonance - Non-Ideal Inductor Model
- 3.2 Non-Ideal Behavior of Resistors
- 3.2.1 Circuit Model and Impedance
- 3.2.2 Parasitic Capacitance Estimation - Discrete Components
- 3.2.3 Parasitic Capacitance Estimation - PCB Components
- 3.3 Non-Ideal Behavior of Capacitors
- 3.3.1 Circuit Model and Impedance
- 3.3.2 Parasitic Inductance Estimation - Discrete Components
- 3.3.3 Parasitic Inductance Estimation - PCB Components
- 3.4 Non-Ideal Behavior of Inductors
- 3.4.1 Circuit Model and Impedance
- 3.4.2 Parasitic Capacitance Estimation - Discrete Components
- 3.4.3 Parasitic Capacitance Estimation - PCB Components
- 3.5 Non-Ideal Behavior of a PCB Trace
- 3.5.1 Circuit Model and Impedance
- 3.6 Impact of the PCB Trace Length on Impedance of the Passive Components
- 3.6.1 Impedance of a Resistor - Impact of the PCB Trace
- 3.6.2 Impedance of a Capacitor - Impact of the PCB Trace
- 3.6.3 Impedance of an Inductor - Impact of the PCB Trace
- 3.6.4 Impedance of an Inductor vs. Impedance of the PCB Trace
- 3.7 Laboratory Exercises
- 3.7.1 Non-Ideal Behavior of Capacitors and Inductors, and Impact of the PCB Trace Length on Impedance
- 3.7.2 Laboratory Equipment and Supplies
- 3.7.3 Laboratory Procedure - Non-Ideal Behavior of Capacitors and Inductors
- 3.7.4 Laboratory Procedure - Impact of the PCB Trace Length on Impedance
- References
- 4 Power Distribution Network
- 4.1 CMOS Inverter Switching
- 4.2 Decoupling Capacitors
- 4.2.1 Decoupling Capacitor Impact - Measurements
- 4.2.2 Decoupling Capacitor Configurations
- 4.3 Decoupling Capacitors and Embedded Capacitance
- 4.3.1 Decoupling Capacitors and Closely vs. Not Closely Spaced Power and Ground Planes
- 4.3.2 Impact of the Number and Values of the Decoupling Capacitors
- 4.4 Laboratory Exercises
- 4.4.1 Decoupling Capacitors
- 4.4.2 Embedded Capacitance and Decoupling Capacitors
- References
- 5 EMC Filters
- 5.1 Insertion Loss Definition
- 5.2 Basic Filter Configurations
- 5.3 Source and Load Impedance Impact
- 5.4 What Do We Mean by Low or High Impedance?
- 5.5 LC and CL Filters
- 5.5.1 LC Filter
- 5.5.2 CL Filter
- 5.5.3 LC Filter vs. CL Filter
- 5.6 Pi and T Filters
- 5.6.1 Pi Filter
- 5.6.2 T Filter
- 5.6.3 Pi Filter vs. T Filter
- 5.7 LCLC and CLCL Filters
- 5.7.1 LCLC Filter
- 5.7.2 CLCL Filter
- 5.7.3 LCLC Filter vs. CLCL Filter
- 5.8 Laboratory Exercises
- 5.8.1 Input Impedance and Insertion Loss of EMC Filters
- 5.8.2 Laboratory Equipment and Supplies
- 5.8.3 Laboratory Procedure
- References
- 6 Transmission Lines - Time Domain
- 6.1 Introduction
- 6.1.1 Transmission Line Effects
- 6.1.2 When a Line Is not a Transmission Line
- 6.1.3 Transmission Line Equations
- 6.2 Transient Analysis
- 6.2.1 Reflections at a Resistive Load
- 6.2.2 Reflections at a Resistive Discontinuity
- 6.2.3 Reflections at a Shunt Resistive Discontinuity
- 6.2.4 Reflections with Transmission Lines in Parallel
- 6.2.5 Reflections at a Reactive Load
- 6.2.6 Reflections at a Shunt Reactive Discontinuity
- 6.3 Eye Diagram
- 6.3.1 Fundamental Concepts
- 6.3.2 Impact of Driver, HDMI Cable, and Receiver
- 6.4 Laboratory Exercises
- 6.4.1 Transmission Line Reflections
- 6.4.2 Laboratory Equipment and Supplies
- 6.4.3 Reflections at a Resistive Load
- 6.4.4 Bounce Diagram
- 6.4.5 Reflections at a Resistive Discontinuity
- References
- 7 Transmission Lines - Frequency Domain
- 7.1 Frequency-Domain Solution
- 7.1.1 The Complete Circuit Model - Voltage, Current, and Input Impedance along the Transmission Line
- 7.1.2 Frequency-Domain Solution - Example
- 7.2 Smith Chart and Input Impedance to the Transmission Line
- 7.2.1 Smith Chart Fundamentals
- 7.2.2 Input Impedance to the Transmission Line
- 7.3 Standing Waves and VSWR
- 7.4 Laboratory Exercises
- 7.4.1 Input Impedance to Transmission Line - Smith Chart
- 7.4.2 Laboratory Procedure - Smith Chart
- References
- 8 Antennas and Radiation
- 8.1 Bridge Between the Transmission Line Theory and Antennas
- 8.2 Electric (Hertzian) Dipole Antenna
- 8.2.1 Wave Impedance and Far-Field Criterion
- 8.2.2 Wave Impedance in the Near Field
- 8.3 Magnetic Dipole Antenna
- 8.3.1 Wave Impedance and Far-Field Criterion
- 8.3.2 Wave Impedance in the Near Field
- 8.4 Half-Wave Dipole and Quarter-Wave Monopole Antennas
- 8.4.1 Half-Wave Dipole Antenna
- 8.4.2 Quarter-Wave Monopole Antenna
- 8.5 Balanced-Unbalanced Antenna Structures and Baluns
- 8.5.1 Balanced and Unbalanced Half-Wave Dipole Antenna
- 8.5.2 Sleeve (Bazooka) Balun
- 8.5.3 Input Impedance to the Transmission Line
- 8.5.4 Quarter-Wavelength Sleeve Balun
- 8.6 Sleeve Dipole Antenna Design and Build
- 8.6.1 Symmetrically Driven Half-Wave Dipole Antenna
- 8.6.2 Asymmetrically Driven Dipole Antenna and a Sleeve Dipole
- 8.6.3 Sleeve Dipole Antenna Design
- 8.6.4 Sleeve Dipole Antenna Design Through Simulation
- 8.6.5 Construction and Tuning of a Sleeve Dipole
- 8.7 Antennas Arrays
- 8.8 Log-Periodic Antenna
- 8.9 Biconical Antenna
- 8.10 Antenna Impedance and VSWR
- 8.11 Laboratory Exercises
- 8.11.1 Log-Periodic and Bicon Antenna Impedance and VSWR Measurements
- 8.11.2 Loop Antenna Construction
- References
- 9 Differential- and Common-Mode Currents and Radiation
- 9.1 Differential- and Common-Mode Currents
- 9.1.1 Common-Mode Current Creation
- 9.2 Common-Mode Choke
- 9.3 Differential-Mode and Common-Mode Radiation
- 9.3.1 Differential-Mode Radiation
- 9.3.2 Common-Mode Radiation
- 9.4 Laboratory Exercises
- 9.4.1 Differential-Mode and Common-Mode Current Measurement
- 9.4.2 Laboratory Equipment and Supplies
- 9.4.3 Laboratory Procedure - Differential-Mode and Common-Mode Current Measurements
- References
- 10 Return-Current Path, Flow, and Distribution
- 10.1 Return-Current Path
- 10.2 Return-Current Flow
- 10.3 Return-Current Distribution
- 10.3.1 Microstrip Line PCB
- 10.3.2 Stripline PCB
- 10.4 Laboratory Exercises
- 10.4.1 Path of the Return Current
- References
- 11 Shielding to Prevent Radiation
- 11.1 Uniform Plane Wave
- 11.1.1 Skin Depth
- 11.1.2 Current Density in Conductors
- 11.1.3 Reflection and Transmission at a Normal Boundary
- 11.2 Far-Field Shielding
- 11.2.1 Shielding Effectiveness - Exact Solution
- 11.2.2 Shielding Effectiveness - Approximate Solution - Version 1
- 11.2.3 Shielding Effectiveness - Approximate Solution - Version 2
- 11.2.4 Shielding Effectiveness - Simulations
- 11.3 Near-Field Shielding
- 11.3.1 Electric Field Sources
- 11.3.2 Magnetic Field Sources
- 11.3.3 Shielding Effectiveness - Simulations
- 11.3.4.
- Shielding Effectiveness - Measurements
- 11.4 Laboratory Exercises
- 11.4.1 Shielding Effectiveness - Simulations
- 11.4.2 Shielding Effectiveness - Measurements
- References
- 12 SMPS Design for EMC
- 12.1 Basics of SMPS Operation
- 12.1.1 Basic SMPS Topology
- 12.1.2 Basic SMPS Design
- 12.2 DC/DC Converter Design with EMC Considerations
- 12.2.1 Switching Frequency
- 12.2.2 Output Inductor
- 12.2.3 Output Capacitor
- 12.2.4 Catch Diode
- 12.2.5 Input Capacitor
- 12.2.6 Bootstrap Capacitor
- 12.2.7 Undervoltage Lockout
- 12.2.8 Feedback Pin
- 12.2.9 Compensation Network
- 12.2.10 Complete Regulator Circuitry
- 12.2.11 EMC Considerations
- 12.3 Laboratory Exercises
- 12.3.1 SMPS Design and Build
- 12.3.2 Laboratory Equipment and Supplies
- 12.3.3 Laboratory Procedure
- References
- A Evaluation of EMC Emissions and Ground Techniques on 1- and 2-Layer PCBs with Power Converters
- A. 1 Top-Level Description of the Design Problem
- A.. 1 Functional Block Details
- A.1. 2 One-Layer Board Topologies
- A.1. 3 Two-Layer Board Topologies
- A. 2 DC/DC Converter - Baseline EMC Emissions Evaluation
- A.2. 1 CISPR 25 Radiated Emissions Test Results
- A.. 2 CISPR 25 Conducted Emissions (Voltage Method) Test Results
- A.2. 3 CISPR 25 Conducted Emissions (Current Method) Test Results
- A. 3 DC/DC Converter - EMC Countermeasures - Radiated Emissions Results
- A.3. 1 EMC-A and EMC-E Input and Output Capacitor Impact
- A.3. 2 EMC-A Input Inductor Impact
- A.. 3 EMC-C Switching Inductor Impact
- A.3. 4 EMC-B and EMC-D Snubber Impact
- A.3. 5 EMC-A, EMC-E - Conducted Emissions Countermeasures Impact
- A.3. 6 Impact of the Shield Frame
- A. 4 DC/DC Converter - EMC Countermeasures - Conducted Emissions Results - Voltage Method
- A.4. 1 EMC-A and EMC-E Input and Output Capacitor Impact
- A.4. 2 EMC-A Input Inductor Impact
- A.4. 3 EMC-A Additional Input Capacitors Impact
- A.. 4 EMC-A Input Inductor Impact
- A.4. 5 EMC-C Switching Inductor Impact
- A.4. 6 EMC-B and EMC-D Snubber Impact
- A. 5 DC/DC Converter - EMC Countermeasures - Conducted Emissions Results - Current Method
- A.5. 1 EMC-A, EMC-C, and EMC-E Input and Output Capacitor and Inductor Impact
- A.5. 2 EMC-B and EMC-D Snubber Impact
- A. 6 PCB Layout Considerations
- A.6. 1 Introduction
- A.6. 2 Visualizing Complete Forward and Return Paths
- A.6. 3 Return-Plane Split in AC-DC Converter
- A. 7 AC/DC Converter Design with EMC Considerations
- A.7. 1 AC/DC Converter Schematics and Design Requirements
- A.7. 2 EMC Considerations
- A. 8 AC/DC Converter - Baseline EMC Emissions Evaluation
- A.8. 1 Radiated Emissions Test Results
- A.8. 2 Conducted Emissions Test Results
- A. 9 AC/DC Converter - EMC Countermeasures - Conducted and Radiated Emissions Results
- A.9. 1 Conducted Emissions Test Results
- A.9. 2 Radiated Emissions Test Results
- A. 10 Complete System - Conducted and Radiated Emissions Results
- A.0. 1 Complete System and Board Topologies
- A.10. 2 Conducted Emissions Results
- A.10. 3 Radiated Emissions Results
- A.10. 4 Conclusions
- References
- Index.