The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits [electronic resource] : the semi-empirical and compact model approaches / by Paul G.A. Jespers.

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Bibliographic Details
Online Access:	Full Text (via Springer)
Main Author:	Jespers, Paul G.
Format:	Electronic eBook
Language:	English
Published:	Dordrecht ; New York : Springer, ©2010.
Series:	Analog circuits and signal processing series.
Subjects:	Metal oxide semiconductors, Complementary > Design and construction. Low voltage integrated circuits > Design and construction. Linear integrated circuits > Design and construction.

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Call Number:	TK7871.99.M44 J47 2010
TK7871.99.M44 J47 2010	Available